1. Field of the Invention
The present invention relates to a correlator for spread spectrum communication for use on the side of a receiver of a spread spectrum communication system in mobile communication, radio LAN, and the like.
2. Description of the Related Art
Generally in a spread spectrum (SS) communication system for use in mobile communication or radio LAN, two-stage modulations, that is, narrow band modulation (primary modulation) and further spread modulation (secondary modulation) are performed on transmission data and the data is transmitted on the transmission side, while on the reception side, inverse spreading is performed on the received data, thereby returning to the primary modulation, and base band signals are reproduced in a usual wave detector circuit.
Furthermore, a conventional correlator for spread spectrum communication to obtain correlation for modulating received signals with spread spectra is constituted of an inverse spread circuit, and a modulation circuit for code division multiple access modulation waves. Specifically, a sliding correlator (SC) constituted of a logical circuit is used in the spread spectrum communication correlator in order to perform synchronous capturing and subsequently take correlation with a detected synchronous phase.
The sliding correlator uses one correlator of one to shift station issued code series (spread codes) by each bit, and obtains the correlation with each received code series. When the correlation is obtained with respect to the number of chips corresponding to the length of one symbol, the synchronous phase in which the correlation reaches its peak is obtained, and the synchronous capturing is performed.
Here the sliding correlator as one conventional inverse spread circuit will be described with reference to FIG. 14. FIG. 14 is a block diagram of one part of the conventional sliding correlator.
In the conventional sliding correlator a section for obtaining a correlation output is constituted of an A/D converter 31, a multiplier 32, a PN code register 33, an adder 34, and a delay circuit 35.
Each component of the conventional sliding correlator will be described.
The A/D converter 31 is a high precision analog/digital converter which converts an analog signal subjected to code division multiple access (CDMA) modulation, transmitted, and received by an antenna (not shown) into a digital signal.
The PN code register 33 is a register for outputting a pseudo random noise (PN) code which is the same spread code as the code used in the CDMA modulation on the transmission side.
The multiplier 32 is a multiplier which multiplies the digital reception data outputted from the A/D converter 31 by the PN code outputted from the PN code register 33.
The adder 34 and the delay circuit 35 accumulate/add multiplication results outputted from the multiplier 32 for one symbol period and output the integration value as the correlation output.
The operation of the conventional sliding correlator comprises converting the analog signal of the reception data received by the antenna into the digital signal by the A/D converter 31, multiplying the digital signal by the PN code outputted from the PN code register 33by the multiplier 32, performing accumulation/addition by the adder 34 and the delay circuit 35, and outputting the addition result for one symbol as the correlation output.
Subsequently, the accumulation/addition is repeated by shifting the multiplication timing in the multiplier 32 by one chip(more precisely, an interval of sample in the A/D converter) to change the phase, and the synchronous phase in which the correlation output reaches its peak is detected.
This constitution using the sliding correlator as the inverse spread circuit is relatively simple, has a small number of gates, and has little power consumption. However, since the time for the time of one symbolxc3x97the number of chips in one symbol is necessary until the synchronous capturing is performed, there is a problem that much time is necessary until the correlation output is obtained.
To solve the problem that much time is required until the correlation output is obtained, the use of a matched filter (MF) in the spread spectrum communication correlator instead of the sliding correlator is proposed.
The matched filter performs the synchronous capturing within one symbol time by collectively taking the correlation when the phase is shifted.
Here the matched filter as another example of the conventional inverse spread circuit will be described with reference to FIG. 15. FIG. 15 is a block diagram showing the constitution example of the conventional matched filter.
The conventional matched filter is constituted of an A/D converter 41, a multiplier 42, a PN code register 43, an adder 44, and a sample hold (S/H) circuit 45.
Each component of the conventional matched filter will be described.
The A/D converter 41 is a converter which converts an analog input signal subjected to the CDMA modulation, transmitted to a digital signal.
The sample hold (S/H) circuit 45 comprises a plurality of circuits for successively taking and holding the digital signals from the A/D converter 41.
The PN code register 43 is a register for outputting the PN code which is a spread code.
The multiplier.42 is a multiplier which multiplies the digital signal held by each sample hold circuit 45 by the PN code from the PN code register 43.
The adder 44 is an adder for collectively adding the outputs from the multiplier 42.
The operation of the conventional matched filter comprises successively holding the input signals subjected to digital conversion in the A/D converter 41 by a plurality of S/H circuits 45, multiplying the output from the S/H circuit 45 by the PN code outputted from the PN code register 43 by the multiplier 42, further collectively adding the multiplication result of the multiplier 42 by the adder 44, and outputting the addition result. The correlation output is obtained from the addition result.
In the general matched filter, however, in order to take the correlation when the phase is collectively shifted, different from the above-described sliding correlator, for example, the number of gates multiplied by the number of chips in one symbol is necessary, and the gate scale is enlarged, thereby causing the increase of LSI price and power consumption, so that it is actually difficult to use the matched filter in a mobile terminal receiver.
As described above, the conventional sliding correlator has a problem that much time is required until the correlation output is obtained, and the conventional matched filter has a problem that the number of gates is increased, thereby resulting in the increase of LSI price and power consumption.
An object of the present invention is to provide a correlation circuit for spread spectrum communication, which reduces the number of constituting elements to achieve a low LSI price and can obtain correlation outputs.
According to the present invention, in the spread spectrum communication correlation circuit, a processing is repeated a plurality of times, comprising writing a spectrum spread reception signal into a memory, reading the written spread spectrum signal from the memory at a speed higher than the writing speed and performing product sum operation with a spread code at a high speed, the number of constituting elements is reduced, and the correlation output can be obtained in a short time as compared with the matched filter.
Moreover, according to the present invention, there is provided a correlation circuit for spread spectrum communication, comprising one or more receiving sections for receiving spread spectrum signals, one or more memory sections for holding the received spread spectrum signals, one or more multipliers for multiplying the signal held in the memory section and a spread code, and one or more adding sections for adding multiplication results. The spread spectrum signal inputted from one or more receiving sections is time-divided in a sampling time or a time shorter than the sampling time, at least one symbol of time-divided signals are held in the memory section, the held signals are read in a time which is further shorter than the time shorter than the chip time, the signal is multiplied by the spread code in the multiplying section, and the multiplication results are added by the adding section to obtain the correlation, so that the number of constituting elements is reduced and the correlation output can be obtained in a short time as compared with the matched filter.
Moreover, according to the present invention, there is provided an interference canceler provided with a plurality of interference canceler units having matched filters for an in-phase component (I) and an orthogonal component (Q) of an orthogonal wave detecting signal of a received spread spectrum signal, comprising a memory disposed in the previous stage of the matched filter which can perform writing and reading at the same time and can perform the reading at a speed higher than a writing speed. The matched filter performs a high-speed operation processing of the signal read from the memory at a high speed. The number of constituting elements is reduced and interference canceling can be performed in a short time.
Furthermore, according to the present invention, since the correlation circuit for spread spectrum. communication repeats a processing a plurality of times comprising writing a spectrum spread reception signal into a memory, storing the written signal to a logical section. for reading the signal from the memory via multiple taps in accordance with a time conversion amount to perform time conversion, performing parallel/serial conversion in the logical section at a speed higher than the writing speed of the memory to perform the time conversion, and performing a high-speed product sum operation with a spread code, the number of constituting elements is reduced, and the correlation output can be obtained.
Additionally, according to the present invention, there is provided a correlator for spread spectrum communication, comprising one or more receiving sections for receiving spread spectrum signals, one or more memory sections for holding the received spread spectrum signals, one or more logical sections for performing time conversion to perform a high-speed operation processing of the signal read from the memory, one or more multiplying sections for multiplying the signal held in the memory section and a. spread code, and one or more adding sections for adding multiplication results. The spread spectrum signal inputted from one or more receiving sections is time-divided in a sampling time or a time shorter than the sampling time, about one symbol of time-divided signals are held in the memory section, the signals held in the memory section are read via multiple taps in accordance with a time conversion amount in the logical section to perform a high-speed parallel/serial conversion and time conversion, the signal is multiplied by the spread code in the multiplying section, and the multiplication results are added by the adding section to obtain the correlation, so that the number of constituting elements is reduced and the correlation output can be obtained.
Moreover, according to the present invention, there is provided a correlation circuit for spread spectrum communication, comprising two sets of the correlators for spread spectrum communication, in which the receiving section in the correlators is used in common, an in-phase component (I) and an orthogonal component (Q) of an orthogonal wave detecting signal of a spread spectrum signal wave-detected by the receiving section are multiplied by different spread codes, and multiplication results are added.
Furthermore, according to the present invention, there is a correlation circuit for spread spectrum communication, comprising four sets of the correlators for spread spectrum communication, in which two sets are regarded as a pair, the receiving section in the pair of correlators is used in common, an in-phase component (I) and an orthogonal component (Q) of an orthogonal wave. detecting signal of a spread spectrum signal wave-detected by the receiving section are multiplied by different first and second spread codes in each pair, and for four correlation outputs obtained by adding multiplication results, the results of operation with the first spread code and the results of operation with the second spread code are added and synthesized.